The probe head (right) moves across circuit components on a chip. Image: NIST
The program is supported by IARPA and adheres to guidelines—envisioned in the National Strategic Computing Initiative—that call for components to perform 100 times faster than today’s best supercomputers using only 1/1000 of the energy.
“This partnership with IARPA on the C3 supercomputing program,” says Bob Hickernell, chief of NIST’s Quantum Electromagnetics Division, “combines the expertise of industry leaders in both cryogenic memory and logic circuitry development together with NIST’s expertise in superconducting electronics and magnetics measurements at ultralow temperatures to accelerate progress that promises high impact in areas including biomedical understanding and treatments, advanced materials development and high-accuracy weather forecasting.”
NIST is responsible for characterizing each individual device (typically 100 nm to 1 µm) in each chip (typically 5 mm to 10 mm in size) and its subcomponents at 4 K. The team uses a cryostat that has a temperature instability of only 50 millikelvins. It houses a NIST-designed three-axis manipulator guided by an optical feedback system to probe specific points. The researchers also test the same devices at room temperature to look for correlations in properties across a span of about 300 K. This range of testing, according to NIST, allows room temperature testing of devices to provide quantitative predictive behavior at 4 K.
“What they want NIST to do is verify that those devices perform as the makers say they do,” says William Rippard, leader of NIST’s Spin Electronics Group, which is testing memory components. “That means that we have to be able to measure uncommonly faint signals on unusually fast time scales. Both have required us to develop new measurement capabilities. The new probe system is a major part of that effort.”
The system is fully automated and is capable of exactly positioning the probe tip using optical feedback from a camera looking down at the surface of the chip at 4 K. This arrangement allows the probe tip to move over the device in precisely incremented steps, and increases the efficiency of evaluating circuits that could contain large arrays of 10,000 or more Josephson junctions.
Another challenge is the speed involved. The superconducting circuits operate on time scales of picoseconds (ps), a millionth of a millionth of a second. “In a typical setup, you have maybe two meters of cable that runs between the device you’re testing and the instrumentation,” Rippard says. “When a picosecond pulse travels through that much cable, it gets attenuated and spread out. What started as a really sharp signal is stretched out until it looks like a bell curve.”
To circumvent that problem, the group is devising specialized circuits that will allow for signal amplification only centimeters away from the chip that produced it. Conversely, to send ultra short signals to the chip, the team uses a femtosecond laser (firing at pulse of light 0.2 ps in duration) and converts the optical signal to an electric pulse in the range of a few picoseconds.
The probe electrodes can be replaced with highly responsive sensors that measure a 2D pattern of magnetic activity across the chip. The system currently uses a read-write head from a hard disk drive to measure those fields, but the team is developing a more sensitive replacement.
The magnetic data creates a map of current flow that reveals buried electrical layers. And the measurements also help researchers locate the vortices—small eddies of current—that form under certain conditions in superconducting materials; and determine whether the vortices are immobile (“pinned” in a single location) or can move around the superconducting circuit and thereby generate resistance to supercurrent flow. ■
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