A quantum device can be defined as a device whose functionality or principle of operation depends essentially on quantum mechanical effects and are inescapable nowadays, primarily to satiate the ever-increasing appetite for slimmer gadgets. As such, the ever-increasing improvement of nanofabrication processes has led to promising demonstration of high quality solid-state quantum devices functioning at sub-Kelvin temperatures. In particular, efforts are currently focused towards the development of silicon-based quantum systems that could be operated above 1 K.
Such progress has paved way for the realization of truly scalable quantum bit architectures leveraging mature complementary metal-oxide-semiconductor (CMOS) technologies. However, current classical electronic tools and rack-scale instruments used to control few-qubit systems from outside the cryostat cause major scalability, automation and performance issues hindering the fabrication of full-scale quantum computers. Overcoming these pitfalls therefore requires fully integrated cryogenic quantum–classical interfaces able to control qubits from inside refrigerators. Literature has it that such an interface would be composed of CMOS-based digital and analog electronics, enabling mixed-signal control systems. In that scope, non-volatile cryogenic memory technologies hold a key role to store data related to qubit states and error correction algorithms. To this end, standard dynamic random-access memory-based cryogenic systems have been investigated at 77 K; nonetheless, it has been hypothesized that emerging nanoscale resistive memory devices with better scalability could play a key role to enable large-scale quantum systems.
Generally, non-volatile resistive switching devices are considered as prime candidates for next-generation memory applications operating at room temperature and above, such as resistive random-access memories or brain-inspired in-memory computing. However, their operability in cryogenic conditions remains to be mastered to adopt these devices as building blocks enabling large-scale quantum technologies via quantum–classical electronics co-integration. To address this, University of Sherbrooke researchers: Pr. Yann Beilliard, Dr. François Paquette, Dr. Frederic Brousseau, Pr. Serge Ecoffey, Pr. Fabien Alibart and Pr. Dominique Drouin investigated multilevel resistive switching of TiN/Al2O3/TiO2-x/Ti/TiN memory devices conducted at 1.5 K. Their work is currently published in the research journal IOP Nanotechnology.
In their approach, full switching cycles were first performed between 300 and 1.5 K, revealing metal-insulator transition-induced negative differential resistance effects below 110 K. Analysis of the current-voltage (I–V) curves was then conducted for the multilevel SET and RESET processes, showing that space-charge limited current and trap-assisted tunneling to be dominant for specific field ranges and resistance states.
The research team reported the carrier transport analysis of all multilevel switching I–V curves showed that while the insulating regime follows the space charge limited current (SCLC) model for all resistance states, the conduction in the metallic regime was dominated by SCLC and trap-assisted tunneling for low- and high-resistance states respectively. Moreover, a non-monotonic conductance evolution was observed in the insulating regime, as opposed to the continuous and gradual conductance increase and decrease obtained in the metallic regime during the multilevel SET and RESET operations. The research team suggest the non-monotonic conductance evolution in the insulating regime was due to the combined effects of longitudinal and radial variations of the Ti4O7 conductive filament during the DC switching. This behavior could be the result of the interplay between temperature- and field-dependent geometrical and physical evolution of the filament.
In summary, the study reported on successful multilevel resistive switching of CMOS compatible TiN/Al2O3/TiO2-x/Ti/TiN memory devices at 1.5 K, exhibiting a Joule-heating-induced MIT at a critical ambient temperature of 110 K. Remarkably, the conductance increase/decrease in the metallic regime was seen to be continuous and gradual, contrary to the insulating regime characterized by a non-monotonic conductance evolution. In a statement to Advances in Engineering, Professor Yann Beilliard explained that their findings not only bring a new light on the resistive switching mechanisms of TiO2-based memory devices, but also pave the way towards memristor-based cryogenic electronics dedicated to control solid-state quantum systems.
Yann Beilliard, François Paquette, Frederic Brousseau, Serge Ecoffey, Fabien Alibart, Dominique Drouin. Conductive filament evolution dynamics revealed by cryogenic (1.5 K) multilevel switching of CMOS-compatible Al2O3/TiO2 resistive memories. Nanotechnology: volume 31 (2020) 445205.